发明授权
- 专利标题: Packet switch device and scheduling control method
- 专利标题(中): 分组交换机和调度控制方法
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申请号: US09759181申请日: 2001-01-12
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公开(公告)号: US06920145B2公开(公告)日: 2005-07-19
- 发明人: Naoki Matsuoka , Hiroshi Tomonaga , Kenichi Kawarai
- 申请人: Naoki Matsuoka , Hiroshi Tomonaga , Kenichi Kawarai
- 申请人地址: JP Kawasaki
- 专利权人: Fujitsu limited
- 当前专利权人: Fujitsu limited
- 当前专利权人地址: JP Kawasaki
- 代理机构: Katten Muchin Zavis Rosenman
- 优先权: JP2000-006360 20000112
- 主分类号: H04L12/931
- IPC分类号: H04L12/931 ; H04L12/937 ; H04L12/56
摘要:
A packet switch device having a plurality of input buffers; a packet switch; a plurality of schedulers, having a pipeline scheduling process module wherein a plurality of time units corresponding to the number of output lines is spent in scheduled sending process of the fixed length packets from the input buffer, and wherein the scheduled sending process is executed in a number of processes, in parallel, the number of processes corresponding to the number of the input lines, having a sending status management module wherein sending status of the fixed length packets which constitute one frame is managed for each of the input lines, and provided corresponding to any of the output lines; and at least one result notification module for notifying the input buffer of result information from the scheduled sending process performed by each of the plurality of schedulers. Further, in the scheduled sending process executed in a number of processes, in parallel, the device does not select the input line sending the fixed length packets corresponding to the same frame, and, after determining a selection, the device maintains the selection of the same input line until the completion of sending the fixed length packets corresponding to the same frame.
公开/授权文献
- US20010007562A1 Packet switch device and scheduling control method 公开/授权日:2001-07-12