发明授权
US06921708B1 Integrated circuits having low resistivity contacts and the formation thereof using an in situ plasma doping and clean
失效
具有低电阻率触点的集成电路及其使用原位等离子体掺杂和清洁的形成
- 专利标题： Integrated circuits having low resistivity contacts and the formation thereof using an in situ plasma doping and clean
- 专利标题（中）： 具有低电阻率触点的集成电路及其使用原位等离子体掺杂和清洁的形成
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申请号： US09549214申请日： 2000-04-13
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公开(公告)号： US06921708B1公开(公告)日： 2005-07-26
- 发明人: Sujit Sharan , Gurtej S. Sandhu
- 申请人： Sujit Sharan , Gurtej S. Sandhu
- 申请人地址： US ID Boise
- 专利权人： Micron Technology, Inc.
- 当前专利权人： Micron Technology, Inc.
- 当前专利权人地址： US ID Boise
- 代理机构： Klarquist Sparkman, LLP
- 主分类号： H01L21/285
- IPC分类号： H01L21/285 ; H01L21/306 ; H01L21/768 ; H01L23/485 ; H01L21/26
摘要：
Contact areas comprising doped semiconductor material at the bottom of contact holes are cleaned in a hot hydrogen plasma and exposed in situ during and/or separately from the hot hydrogen clean to a plasma containing the same dopant species as in the semiconductor material so as to partially, completely, or more than completely offset any loss of dopant due to the hot hydrogen clean. A protective conductive layer such as a metal silicide is then formed over the contact area in situ. The resulting integrated circuit has contacts with interfaces such as a silicide interfaces to contact areas having a particularly favorable dopant profile and concentration adjacent the silicide interfaces.