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US06928000B2 Semiconductor memory device having a resistance adjustment unit 失效
具有电阻调节单元的半导体存储器件

Semiconductor memory device having a resistance adjustment unit
摘要:
The present invention provides a semiconductor memory device that performs a highly reliable data read operation at a high speed. This semiconductor memory device reads data stored in memory cells in accordance with a result of a comparison between a signal read out from the memory cells, which are connected to a word line, with a signal read out from a reference cell connected to a reference word line. This semiconductor memory device includes a load capacity adjustment circuit that adjusts the timing of starting up the gate of the reference cell in accordance with each location of the connection of the memory cells to the word line.
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