发明授权
- 专利标题: Variable column redundancy region boundaries in SRAM
- 专利标题(中): SRAM中的可变列冗余区域边界
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申请号: US10905451申请日: 2005-01-05
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公开(公告)号: US06944075B1公开(公告)日: 2005-09-13
- 发明人: Steven M. Eustis , Michael T. Fragano , Michael R. Ouellette
- 申请人: Steven M. Eustis , Michael T. Fragano , Michael R. Ouellette
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 代理机构: Greenblum & Bernstein, P.L.C.
- 代理商 Michael J. LeStrange
- 主分类号: G11C7/00
- IPC分类号: G11C7/00
摘要:
A method of assigning bits to redundant regions for variable bit redundancy region boundaries in a compliable memory such as a 1-port SRAM is provided. Methods include allocating bits between the redundant regions in nearly equal proportions while minimizing the amount of chip real estate consumed by the memory. Methods also includes allocating bits in equal portions between redundant regions while occupying slightly more memory chip real estate. Methods also allocate bits into redundant regions with a simplified procedure which may or may not allocate bits into the redundant regions in equal proportions. All of the methods allow the total number of memory bits in the complied memory to be re-defined while maintaining the same allocation characteristics for each method. Accordingly, the methods allow efficient use of redundant memory bits while also conserving chip real estate or offering simplified allocation steps.
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