发明授权
US06950490B1 Fault state detection mechanism for a ring-counter-based frequency divider-by-N that generates non-overlapping N-phases of divide-by-N clocks with 1/N duty ratio
有权
基于振铃计数器的分频器N的故障状态检测机制，其产生具有1 / N占空比的N分频N倍的非重叠N相
- 专利标题： Fault state detection mechanism for a ring-counter-based frequency divider-by-N that generates non-overlapping N-phases of divide-by-N clocks with 1/N duty ratio
- 专利标题（中）： 基于振铃计数器的分频器N的故障状态检测机制，其产生具有1 / N占空比的N分频N倍的非重叠N相
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申请号： US10751673申请日： 2004-01-05
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公开(公告)号： US06950490B1公开(公告)日： 2005-09-27
- 发明人: Yongseon Koh , Jitendra Mohan
- 申请人： Yongseon Koh , Jitendra Mohan
- 申请人地址： US CA Santa Clara
- 专利权人： National Semiconductor Corporation
- 当前专利权人： National Semiconductor Corporation
- 当前专利权人地址： US CA Santa Clara
- 主分类号： H03K21/40
- IPC分类号： H03K21/40 ; H03K23/54
摘要：
A fault state detector for a ring counter is formed from unit current sources each switched under the control of a different one of the outputs of the ring counter. The currents switched in that manner are passed through a unit resistance to generate a voltage signal proportional to the number of asserted outputs from the ring counter. The voltage signal is compared to boundary reference values for valid states of the ring counter outputs and, if the voltage signal is not between the boundary reference values, a fault state is indicated.
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