发明授权
- 专利标题: DC offset cancel circuit
- 专利标题(中): 直流偏移消除电路
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申请号: US10349106申请日: 2003-01-23
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公开(公告)号: US06968172B2公开(公告)日: 2005-11-22
- 发明人: Shinji Saito
- 申请人: Shinji Saito
- 申请人地址: JP Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JP Kawasaki
- 代理机构: Arent Fox PLLC
- 优先权: JP2002-026341 20020204
- 主分类号: H04L25/03
- IPC分类号: H04L25/03 ; H03F3/45 ; H04B1/30 ; H04B1/10 ; H04B1/16
摘要:
This invention is applied to dual mode provided receiver capable of coinciding with both TDMA system and the non-TDMA system so as to provide a DC offset cancel circuit preferable for each communication method having a compact structure. In case where a predetermined time slot is allocated as an offset quantity detection time in the TDMA system, a first feedback loop is activated and corresponding to detection signals corresponding to differential output signals OUT, XOUT by a comparator 2, a detection result is updated in the holding section 3 according to a strobe signal STB and held therein. Output signals from the holding section 3 are fed back to an amplifier 1 through a selection section 5 and a DC offset is cancelled out. In case where the offset quantity is detected successively, a second feedback loop is activated and then, detection signals from the comparator 2 are identified by a filter section 4, and fed back to the amplifier 1 through the selection portion 5, so that the DC offset is cancelled out.
公开/授权文献
- US20030148749A1 DC offset cancel circuit 公开/授权日:2003-08-07