发明授权
- 专利标题: Exploiting shortest path for improved network clock distribution
- 专利标题(中): 利用最短路径改善网络时钟分布
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申请号: US10310554申请日: 2002-12-04
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公开(公告)号: US06973152B2公开(公告)日: 2005-12-06
- 发明人: Kevin Paul Gross
- 申请人: Kevin Paul Gross
- 申请人地址: US TX Austin
- 专利权人: Cirrus Logic, Inc.
- 当前专利权人: Cirrus Logic, Inc.
- 当前专利权人地址: US TX Austin
- 代理机构: Swanson & Bratschun, LLC
- 主分类号: H04L29/08
- IPC分类号: H04L29/08 ; H03D3/24
摘要:
Apparatus and methods are provided for exploiting the existence of a shortest path between a source device and a destination device by identifying the shortest path and using the signal which has taken the shortest path in preference to delayed transmissions or delayed images of the same signal, thereby improving signal distribution. The present invention provides a processor between a phase-sensitive detector and a low pass filter of a phase locked loop for selecting and driving the PLL primarily from the signal which has taken the shortest path.
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