发明授权
US06976157B1 Circuits, systems and methods for performing branch predictions by selectively accessing bimodal and fetch-based history tables
失效
通过有选择地访问双峰和基于获取的历史表来执行分支预测的电路，系统和方法
- 专利标题： Circuits, systems and methods for performing branch predictions by selectively accessing bimodal and fetch-based history tables
- 专利标题（中）： 通过有选择地访问双峰和基于获取的历史表来执行分支预测的电路，系统和方法
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申请号： US09435070申请日： 1999-11-04
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公开(公告)号： US06976157B1公开(公告)日： 2005-12-13
- 发明人: Balaram Sinharoy
- 申请人： Balaram Sinharoy
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Winstead Sechrest & Minick P.C.
- 代理商 Mark E. McBurney
- 主分类号： G06F9/00
- IPC分类号： G06F9/00
摘要：
Branch prediction circuitry including a bimodal branch history table, a fetch-based branch history table and a selector table is provided. The local branch history table includes a plurality of entries each for storing a prediction value and accessed by selected bits of a branch address. The fetch-based branch history table included a plurality of entries for storing a prediction value and accessed by a pointer generated from selected bits of the branch address and bits from a history register. The selector table includes a plurality of entries each for storing a selection bit and accessed by a pointer generated from selected bits from the branch address and bits from the history register, each selector bit is used for selecting between a prediction value accessed from the local history table and a prediction value accessed from the fetch-based history table.
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