发明授权
- 专利标题: Chip inspecting apparatus and method
- 专利标题(中): 芯片检查装置及方法
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申请号: US09968608申请日: 2001-10-02
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公开(公告)号: US06980687B2公开(公告)日: 2005-12-27
- 发明人: Kanji Ikegaya , Takashi Ito , Takaaki Ishii
- 申请人: Kanji Ikegaya , Takashi Ito , Takaaki Ishii
- 申请人地址: JP Tokyo
- 专利权人: Kabushiki Kaisha Topcon
- 当前专利权人: Kabushiki Kaisha Topcon
- 当前专利权人地址: JP Tokyo
- 代理机构: Foley & Lardner LLP
- 优先权: JP2000-301825 20001002; JP2000-301929 20001002
- 主分类号: G06T7/00
- IPC分类号: G06T7/00 ; G06K9/00
摘要:
A method and apparatus for inspecting chips formed as a fine pattern on a surface of an object to be inspected, in which one visual field of an optical observation system is divided into a plurality of areas. A plurality of predetermined good chips are arranged sequentially to each area. Image data of the predetermined good chips are stored at each specific position of the area. In addition, one visual field of the optical observation system is divided into a plurality of areas. When a plurality of good chips are observed in one visual field, coordinates of each good chip are memorized. When good chips in the visual field during learning are recognized, image of the area is obtained as a learned image. Even if the plurality of chips in one visual field of the optical observation system are not entirely nondefective, it can inspect effectively the chips. Further, a problem caused by distortion (distortion aberration) in the optical observation system can be solved.
公开/授权文献
- US20020090129A1 Chip inspecting apparatus and method 公开/授权日:2002-07-11
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