- 专利标题： Method for fabricating an integrated semiconductor circuit
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申请号： US10273524申请日： 2002-10-18
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公开(公告)号： US07007260B2公开(公告)日： 2006-02-28
- 发明人: Helge Altfeld , Monika Gschöderer , Michael Eisenhut , Marc Walter , Beate Frankowsky
- 申请人： Helge Altfeld , Monika Gschöderer , Michael Eisenhut , Marc Walter , Beate Frankowsky
- 申请人地址： DE Munich
- 专利权人： Infineon Technologies AG
- 当前专利权人： Infineon Technologies AG
- 当前专利权人地址： DE Munich
- 代理商 Laurence A. Greenberg; Werner H. Stemer; Ralph E. Locher
- 优先权： DE10151379 20011018
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A method for fabricating an integrated semiconductor circuit having at least two different wiring forms realized in a same metallization plane includes drawing each of the different wiring forms on respectively different layer types. In this manner, the at least two different wiring forms can be individually and jointly analyzed.