发明授权
- 专利标题: Analog to digital converter circuit of successive approximation type operating at low voltage
- 专利标题(中): 在低电压下工作的逐次逼近型模数转换器电路
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申请号: US11029492申请日: 2005-01-06
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公开(公告)号: US07015841B2公开(公告)日: 2006-03-21
- 发明人: Takeshi Yoshida , Atsushi Iwata , Mamoru Sasaki , Miho Akagi , Kunihiko Goto
- 申请人: Takeshi Yoshida , Atsushi Iwata , Mamoru Sasaki , Miho Akagi , Kunihiko Goto
- 申请人地址: JP Yokohama
- 专利权人: Semiconductor Technology Academic Research Center
- 当前专利权人: Semiconductor Technology Academic Research Center
- 当前专利权人地址: JP Yokohama
- 代理机构: Birch, Stewart, Kolasch & Birch, LLP
- 优先权: JPP2004-002449 20040107; JPP2004-342508 20041126
- 主分类号: H03M1/10
- IPC分类号: H03M1/10
摘要:
In a sampling and holding, a control logic circuit connects another end of each capacitor of a DA converter to a ground potential, and outputs a sampled input analog signal from a switched amplifier to one end of a hold capacitor to hold. In a successive approximation, it controls a switched amplifier to set an output terminal thereof to a high-impedance state and the hold capacitor to connect the one end thereof to the ground potential. Then, it switches over connection of another end of each capacitor from the ground potential to a power supply voltage based on a digital value held by a successive approximation register to output an output voltage from another end of the hold capacitor to a comparator, and compares the output voltage from another end thereof with an intermediate reference voltage to obtain a digital value from the successive approximation register.
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