发明授权
US07016259B2 Apparatus for calibrating the relative phase of two reception signals of a memory chip 有权
用于校准存储芯片的两个接收信号的相对相位的装置

  • 专利标题: Apparatus for calibrating the relative phase of two reception signals of a memory chip
  • 专利标题(中): 用于校准存储芯片的两个接收信号的相对相位的装置
  • 申请号: US10949793
    申请日: 2004-09-24
  • 公开(公告)号: US07016259B2
    公开(公告)日: 2006-03-21
  • 发明人: Andreas Jakobs
  • 申请人: Andreas Jakobs
  • 申请人地址: DE Munich
  • 专利权人: Infineon Technologies AG
  • 当前专利权人: Infineon Technologies AG
  • 当前专利权人地址: DE Munich
  • 代理机构: Patterson & Sheridan, L.L.P.
  • 优先权: DE10344818 20030927
  • 主分类号: G11C8/18
  • IPC分类号: G11C8/18
Apparatus for calibrating the relative phase of two reception signals of a memory chip
摘要:
A calibration apparatus is provided for adjusting the relative phase between two signals received at a memory chip, the two signals being generated such that they are synchronized with one another in a controller and are transmitted to the memory chip via separate lines. The calibration apparatus comprises a measuring device, which is arranged in the memory chip and is designed for measuring the relative phase between the two received signals, and a feedback loop containing a phase-controlling correction device. The measuring device is designed for generating an item of control information indicating the deviation of the measured relative phase from a defined tolerance range. The correction device responds to the control information to compensate for the deviation. The correction device is arranged in the controller and is designed for influencing the relative phase between the two signals to be transmitted to the memory chip. The feedback loop contains a signal connection leading from the memory chip to the controller.
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