A frequency divider includes a current generator, a transistor and a clock input connected in series. The transistor comprises a gate and has a threshold voltage. The connection between the current generator and the transistor constituting the output of the frequency divider. The frequency divider additionally has a controlled switch connected between the output and the gate. The switch has a control input connected to the clock input. A method for dividing frequency includes providing a current generator, a transistor and a clock input connected in series. In response to a clock pulse supplied when the output is in a high state, charge is transferred from the output to the gate to raise voltage of the gate above the threshold voltage. In response to the clock pulse supplied when the output is low, charge is transferred from the gate to the output to reduce the voltage of the gate below the threshold voltage.