发明授权
- 专利标题: Phase lock loop circuit and optical repeating apparatus, optical terminal apparatus, and optical communication system having the same
- 专利标题(中): 锁相环电路和光中继装置,光终端装置和具有该锁相环装置的光通信系统
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申请号: US10128672申请日: 2002-04-23
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公开(公告)号: US07027741B2公开(公告)日: 2006-04-11
- 发明人: Masazumi Marutani , Takuji Yamamoto , Naoki Kuwata , Katsuya Yamashita
- 申请人: Masazumi Marutani , Takuji Yamamoto , Naoki Kuwata , Katsuya Yamashita
- 申请人地址: JP Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JP Kawasaki
- 代理机构: Staas & Halsey LLP
- 优先权: JPPCT/JP99/06803 19991203
- 主分类号: H04B10/02
- IPC分类号: H04B10/02
摘要:
According to a PLL circuit of the present invention, an output of a phase comparator is adjusted according to a space-to-mark transition-probability of an input signal so that an output of a voltage controlled oscillator has a predetermined frequency and phase. Therefore, even when a phase of a timing clock is set other than at 0, an output of the PLL circuit can be kept at the set phase, irrespective of the space-to-mark transition-probability. By using the PLL circuit as such in an optical communication apparatus and an optical communication system, a discrimination point can be kept almost fixed, and therefore, it is possible to lower an error rate.
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