发明授权
- 专利标题: Self aligned damascene gate
- 专利标题(中): 自对准镶嵌门
-
申请号: US10699887申请日: 2003-11-04
-
公开(公告)号: US07029958B2公开(公告)日: 2006-04-18
- 发明人: Cyrus E. Tabery , Shibly S. Ahmed , Matthew S. Buynoski , Srikanteswara Dakshina-Murthy , Zoran Krivokapic , Haihong Wang , Chih-Yuh Yang , Bin Yu
- 申请人: Cyrus E. Tabery , Shibly S. Ahmed , Matthew S. Buynoski , Srikanteswara Dakshina-Murthy , Zoran Krivokapic , Haihong Wang , Chih-Yuh Yang , Bin Yu
- 申请人地址: US CA Sunnyvale
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: US CA Sunnyvale
- 代理机构: Harrity Snyder, LLP
- 主分类号: H01L21/00
- IPC分类号: H01L21/00
摘要:
A method for forming a metal-oxide semiconductor field-effect transistor (MOSFET) includes patterning a fin area, a source region, and a drain region on a substrate, forming a fin in the fin area, and forming a mask in the fin area. The method further includes etching the mask to expose a channel area of the MOSFET, etching the fin to thin a width of the fin in the channel area, forming a gate over the fin, and forming contacts to the gate, the source region, and the drain region.
公开/授权文献
- US20050104091A1 Self aligned damascene gate 公开/授权日:2005-05-19
信息查询
IPC分类: