发明授权
US07037770B2 Method of manufacturing strained dislocation-free channels for CMOS
有权
制造用于CMOS的应变无位错通道的方法
- 专利标题： Method of manufacturing strained dislocation-free channels for CMOS
- 专利标题（中）： 制造用于CMOS的应变无位错通道的方法
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申请号： US10687608申请日： 2003-10-20
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公开(公告)号： US07037770B2公开(公告)日： 2006-05-02
- 发明人: Dureseti Chidambarrao , Omer H. Dokumaci
- 申请人： Dureseti Chidambarrao , Omer H. Dokumaci
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Greenblum & Bernstein P.L.C.
- 代理商 Joseph P. Abate, Esq.
- 主分类号： H01L21/00
- IPC分类号： H01L21/00
摘要：
A semiconductor device and method of manufacturing a semiconductor device. The semiconductor device includes channels for a pFET and an nFET. An SiGe layer is grown in the channel of the nFET channel and a Si:C layer is grown in the pFET channel. The SiGe and Si:C layer match a lattice network of the underlying Si layer to create a stress component in an overlying grown epitaxial layer. In one implementation, this causes a compressive component in the pFET channel and a tensile component in the nFET channel. In a further implementation, the SiGe layer is grown in both the nFET and pFET channels. In this implementation, the stress level in the pFET channel should be greater than approximately 3 GPa.