发明授权
- 专利标题: Byte alignment circuitry
- 专利标题(中): 字节对齐电路
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申请号: US10984684申请日: 2004-11-09
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公开(公告)号: US07039787B1公开(公告)日: 2006-05-02
- 发明人: Ramanand Venkata , Chong H. Lee
- 申请人: Ramanand Venkata , Chong H. Lee
- 申请人地址: US CA San Jose
- 专利权人: Altera Corporation
- 当前专利权人: Altera Corporation
- 当前专利权人地址: US CA San Jose
- 代理机构: Fish & Neave IP Group of Ropes & Gray LLP
- 代理商 Robert R. Jackson; Hong S. Lin
- 主分类号: G06F12/00
- IPC分类号: G06F12/00
摘要:
Circuitry for locating the boundaries between bytes in a data stream is only selectively enabled to find a possible new byte alignment by a control signal. After the byte alignment circuitry has found a byte alignment, it outputs byte-aligned data and a first status signal indicating the presence of such data. If the byte alignment circuitry subsequently detects information that suggests a possible need for a new or changed byte alignment, it outputs a second status signal to that effect. However, the byte alignment circuitry does not actually attempt to change its byte alignment until enabled to do so by the control signal. Programmable logic circuitry or other utilization circuitry is typically provided to receive the outputs of the byte alignment circuitry and to selectively provide the control signal.