发明授权
- 专利标题: Via structure for semiconductor chip
- 专利标题(中): 半导体芯片通孔结构
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申请号: US10771000申请日: 2004-02-02
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公开(公告)号: US07042094B2公开(公告)日: 2006-05-09
- 发明人: Chandrasekharan Kothandaraman
- 申请人: Chandrasekharan Kothandaraman
- 申请人地址: DE Munich
- 专利权人: Infineon Technologies AG
- 当前专利权人: Infineon Technologies AG
- 当前专利权人地址: DE Munich
- 代理机构: Brinks Hofer Gilson & Lione
- 主分类号: H01L23/48
- IPC分类号: H01L23/48 ; H01L23/52 ; H01L29/40
摘要:
A multi-level via structure for a semiconductor chip in which the collective area of a vias structure is not entirely oriented directly in-line with the collective area of an adjacent vias structure. In one embodiment, adjacent via structure areas appear to be crisscrossed in relation to one another and in another embodiment adjacent via structure areas do not coincide at all from a perpendicular perspective.
公开/授权文献
- US20050167840A1 Via structure for semiconductor chip 公开/授权日:2005-08-04
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