发明授权
US07045758B2 Scanning image employing multiple chips with staggered pixels 有权
使用具有交错像素的多个芯片的扫描图像

Scanning image employing multiple chips with staggered pixels
摘要:
A solid state imaging system has at least one CMOS imager with first and second series of pixels in which the pixels of one series are offset, i.e., staggered, in respect to the pixels of the other series. Multiple imagers can be arrayed end to end, with jumper wires connecting the pixel output conductors or each so that the pixels feed into a common output amplifier for each series, to minimize chip to chip offset voltages. The pixels may be diagonally offset from one another, and a color imager can be constructed in which color ribbon filters are arranged diagonally across the imaging area. This arrangment minimizes color cross talk.
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