发明授权
US07062610B2 Method and apparatus for reducing overhead in a data processing system with a cache
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用于在具有缓存的数据处理系统中减少开销的方法和装置
- 专利标题: Method and apparatus for reducing overhead in a data processing system with a cache
- 专利标题(中): 用于在具有缓存的数据处理系统中减少开销的方法和装置
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申请号: US10261642申请日: 2002-09-30
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公开(公告)号: US07062610B2公开(公告)日: 2006-06-13
- 发明人: Patrick Conway
- 申请人: Patrick Conway
- 申请人地址: US CA Sunnyvale
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: US CA Sunnyvale
- 代理机构: Larson Newman Abel Polansky & White, LLP
- 主分类号: G06F12/00
- IPC分类号: G06F12/00
摘要:
A data processor (120) recognizes a special data processing operation in which data will be stored in a cache (124) for one use only. The data processor (120) allocates a memory location to at least one cache line of the cache (124). A data producer such as a data communication driver program running on a central processing unit (122) then writes a data element to the allocated memory location. A data consumer (160) reads the data element by sending a READ ONCE request to a host bridge (130). The host bridge (130) provides the READ ONCE request to a memory controller (126), which reads the data from the cache (124) and de-allocates the at least one cache line without performing a writeback from the cache to a main memory (170). In one form the memory controller (126) de-allocates the at least one cache line by issuing a probe marking the next state of the associated cache line as invalid.
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