发明授权
- 专利标题: Method of forming merged FET inverter/logic gate
- 专利标题(中): 形成合并FET逆变器/逻辑门的方法
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申请号: US10728844申请日: 2003-12-08
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公开(公告)号: US07064022B1公开(公告)日: 2006-06-20
- 发明人: Wiley Eugene Hill , Ming-Ren Lin , Bin Yu
- 申请人: Wiley Eugene Hill , Ming-Ren Lin , Bin Yu
- 申请人地址: US CA Sunnyvale
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: US CA Sunnyvale
- 代理机构: Harrity & Snyder LLP
- 主分类号: H01L21/00
- IPC分类号: H01L21/00 ; H01L21/84 ; H01L21/336 ; H01L21/3205 ; H01L21/4763
摘要:
A method forms a semiconductor device from a device that includes a first source region, a first drain region, and a first fin structure that are separated from a second source region, a second drain region, and a second fin structure by an insulating layer. The method may include forming a dielectric layer over the device and removing portions of the dielectric layer to create covered portions and bare portions. The method may also include depositing a gate material over the covered portions and bare portions, doping the first fin structure, the first source region, and the first drain region with a first material, and doping the second fin structure, the second source region, and the second drain region with a second material. The method may further include removing a portion of the gate material over at least one covered portion to form the semiconductor device.
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