Invention Grant
- Patent Title: Packaging method for integrated circuits
- Patent Title (中): 集成电路封装方法
-
Application No.: US10959202Application Date: 2004-10-07
-
Publication No.: US07074651B2Publication Date: 2006-07-11
- Inventor: Jeffrey Lien
- Applicant: Jeffrey Lien
- Applicant Address: TW Taipei
- Assignee: Optimum Care International Tech. Inc.
- Current Assignee: Optimum Care International Tech. Inc.
- Current Assignee Address: TW Taipei
- Agency: Troxell Law Office, PLLC
- Priority: TW93109595A 20040407
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A packaging method for integrated circuits comprising processes such as wafer grinding, wafer mount, wafer saw, die attach, etc., multiple singulated chips are each attached and assembled to leadframe unit, the leadframe unit is used as electrical out-connecting component for each chip, and the wire-bonding part of the chip is dispensed continuously with encapsulant material to seal, curing method is further applied to solidify the encapsulant, then saw or punching method is used to dice apart each chip accompanied with leadframe unit (singulation process), a ready-to-use integrated circuit is thus obtained, such manufacturing processes let the goals of easy-to-manufacture, fast production and lowered-production cost be easily achieved for the packaging and singulating processes.
Public/Granted literature
- US20050227414A1 Packaging method for integrated circuits Public/Granted day:2005-10-13
Information query
IPC分类: