- 专利标题: Manufacturing process of an interpoly dielectric structure for non-volatile semiconductor integrated memories
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申请号: US10356351申请日: 2003-01-30
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公开(公告)号: US07084032B2公开(公告)日: 2006-08-01
- 发明人: Barbara Crivelli , Mauro Alessandri
- 申请人: Barbara Crivelli , Mauro Alessandri
- 申请人地址: IT Agrate Brianza
- 专利权人: STMicroelectronics S.r.l.
- 当前专利权人: STMicroelectronics S.r.l.
- 当前专利权人地址: IT Agrate Brianza
- 代理机构: Seed IP Law Group PLLC
- 代理商 Lisa K. Jorgenson; Robert Iannucci
- 优先权: EP02425044 20020131
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
A process manufactures an interpoly dielectric layer for non-volatile memory cells of a semiconductor device with an interpoly dielectric layer. The process begins with forming the tunnel oxide, and hence the amorphous or polycrystalline silicon layer, using conventional techniques. After the amorphous or polycrystalline silicon layer is surface cleansed and passivated, the surface of the polycrystalline layer is nitrided directly by using radical nitrogen. This is followed by the formation of the interpoly dielectric, either as an ONO layer or a single silicon layer, by means of the CVD technique. Masking to define the floating gate may be performed immediately before or after the direct nitridation step is carried out. The equivalent electrical thickness of the interpoly dielectric, obtained by combining the nitride oxide layer and by the following dielectric, does not exceed 130 Angstroms in either the ONO layer or the single silicon layer embodiment.