发明授权
US07101746B2 Method to lower work function of gate electrode through Ge implantation 有权
通过Ge注入来降低栅电极的功函数的方法

Method to lower work function of gate electrode through Ge implantation
摘要:
A method for forming selective P type and N type gates is described. A gate oxide layer is grown overlying a semiconductor substrate. A polysilicon layer is deposited overlying the gate oxide layer. Germanium ions are implanted into a portion of the polysilicon layer not covered by a mask to form a polysilicon-germanium layer. The polysilicon layer and the polysilicon-germanium layer are patterned to form NMOS polysilicon gates and PMOS polysilicon-germanium gates. In an alternative, nitrogen ions are implanted into the polysilicon-germanium layer and the gates are annealed after patterning to redistribute the germanium ions throughout the polysilicon-germanium layer. In a second alternative, germanium ions are implanted into a first thin polysilicon layer, then a second polysilicon layer is deposited to achieve the total polysilicon layer thickness before patterning the gates.
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IPC分类:
H 电学
H01 基本电气元件
H01L 半导体器件;其他类目中不包括的电固体器件(使用半导体器件的测量入G01;一般电阻器入H01C;磁体、电感器、变压器入H01F;一般电容器入H01G;电解型器件入H01G9/00;电池组、蓄电池入H01M;波导管、谐振器或波导型线路入H01P;线路连接器、汇流器入H01R;受激发射器件入H01S;机电谐振器入H03H;扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R;一般电光源入H05B;印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K;在具有特殊应用的电路中使用的半导体器件见应用相关的小类)
H01L21/00 专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70 .由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理;集成电路器件或其特殊部件的制造(由预制电组件组成的组装件的制造入H05K3/00,H05K13/00)
H01L21/77 ..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理(电可编程只读存储器或其多步骤的制造方法入H01L27/115)
H01L21/78 ...把衬底连续地分成多个独立的器件(改变表面物理特性或者半导体形状的切割入H01L21/304)
H01L21/82 ....制造器件,例如每一个由许多元件组成的集成电路
H01L21/822 .....衬底是采用硅工艺的半导体的(H01L21/8258优先)
H01L21/8232 ......场效应工艺
H01L21/8234 .......MIS工艺
H01L21/8238 ........互补场效应晶体管,例如CMOS
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