发明授权
US07111145B1 TLB miss fault handler and method for accessing multiple page tables
有权
TLB错误处理程序和访问多个页表的方法
- 专利标题： TLB miss fault handler and method for accessing multiple page tables
- 专利标题（中）： TLB错误处理程序和访问多个页表的方法
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申请号： US10397030申请日： 2003-03-25
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公开(公告)号： US07111145B1公开(公告)日： 2006-09-19
- 发明人: Xiaoxin Chen , Alberto J. Munoz
- 申请人： Xiaoxin Chen , Alberto J. Munoz
- 申请人地址： US CA Palo Alto
- 专利权人： VMware, Inc.
- 当前专利权人： VMware, Inc.
- 当前专利权人地址： US CA Palo Alto
- 代理商 Darryl A. Smith
- 主分类号： G06F12/00
- IPC分类号： G06F12/00 ; G06F12/08 ; G06F12/10
摘要：
A virtual memory system implementing the invention provides concurrent access to translations for virtual addresses from multiple address spaces. One embodiment of the invention is implemented in a virtual computer system, in which a virtual machine monitor supports a virtual machine. In this embodiment, the invention provides concurrent access to translations for virtual addresses from the respective address spaces of both the virtual machine monitor and the virtual machine. Multiple page tables contain the translations for the multiple address spaces. Information about an operating state of the computer system, as well as an address space identifier, are used to determine whether, and under what circumstances, an attempted memory access is permissible. If the attempted memory access is permissible, the address space identifier is also used to determine which of the multiple page tables contains the translation for the attempted memory access.
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