发明授权
- 专利标题： Electronic circuit design analysis system
- 专利标题（中）： 电子电路设计分析系统
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申请号： US10651151申请日： 2003-08-28
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公开(公告)号： US07111275B2公开(公告)日： 2006-09-19
- 发明人: Thaddeus Chen , Zhaoqing Chen , Hubert Harrer , Jan Elizabeth Hoffman , Susan Marie Karwoski , Joonsuk Park , Stephen Bruce White , John W. Zack
- 申请人： Thaddeus Chen , Zhaoqing Chen , Hubert Harrer , Jan Elizabeth Hoffman , Susan Marie Karwoski , Joonsuk Park , Stephen Bruce White , John W. Zack
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Wood, Herron & Evans, LLP
- 主分类号： G06F17/50
- IPC分类号： G06F17/50
摘要：
A method, apparatus and program product generate package files that are separately stored and selectively combined to generate a net file suited for system simulation and analysis. Selective combination of the package files using respective reference connections of each package enables focused and efficient modeling of design performance characteristics.
公开/授权文献
- US20050050489A1 Electronic circuit design analysis system 公开/授权日：2005-03-03
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