发明授权
- 专利标题： Method of address distribution time reduction for high speed memory macro
- 专利标题（中）： 高速存储器宏的地址分配时间缩短方法
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申请号： US10965627申请日： 2004-10-14
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公开(公告)号： US07113443B2公开(公告)日： 2006-09-26
- 发明人: Sang Hoo Dhong , Hiroaki Murakami , Shohji Onishi , Osamu Takahashi
- 申请人： Sang Hoo Dhong , Hiroaki Murakami , Shohji Onishi , Osamu Takahashi
- 申请人地址： US NY Armonk
- 专利权人： International Business Machines Corporation
- 当前专利权人： International Business Machines Corporation
- 当前专利权人地址： US NY Armonk
- 代理机构： Carr LLP
- 代理商 Diana R. Gerhardt
- 主分类号： G11C8/00
- IPC分类号： G11C8/00
摘要：
An apparatus, a method, and a computer program product are provided for time reduction and energy conservation during address distribution in a high speed memory macro. To address these concerns, this design divides the typical data arrays into sets of paired subarrays, divides the conventional memory address latches into separate sets, and interposes one set of memory address latches between each pair of subarrays. Therefore, time is saved because the address signals have less wire length to travel and energy is saved because only one set of address latches needs to be powered on for each transmission.
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