发明授权
US07119631B2 Off-chip LC circuit for lowest ground and VDD impedance for power amplifier 失效
用于功率放大器的最低接地和VDD阻抗的片外LC电路

Off-chip LC circuit for lowest ground and VDD impedance for power amplifier
摘要:
Off-chip LC circuit for lowest ground and VDD impedance for power amplifier. A novel approach is made by which a chip to PCB (Printer Circuit Board) interface may be made such that the ground and VDD potential levels are effectively brought onto the die of the chip such that a true ground potential is maintained within the chip. This off-chip LC circuit operates cooperatively with an on-chip decoupling capacitor to reduce the overall effective inductance of the bond wires employed to bring signal and voltage levels from the die to the chip exterior. This circuit ensures a relatively low impedance for a PA (Power Amplifier) that is implemented within chip thereby providing for improved performance.
信息查询
0/0