- 专利标题： Signal processing circuit for noise elimination and demodulator circuit using the same for accurate demodulation
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申请号： US10235234申请日： 2002-09-04
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公开(公告)号： US07120110B2公开(公告)日： 2006-10-10
- 发明人: Akira Mashimo
- 申请人： Akira Mashimo
- 申请人地址： JP
- 专利权人： TEAC Corporation
- 当前专利权人： TEAC Corporation
- 当前专利权人地址： JP
- 代理机构： Anderson Kill & Olick, PC
- 优先权： JP2001-281778 20010917
- 主分类号： G11B5/09
- IPC分类号： G11B5/09
摘要：
A signal processing circuit for eliminating noise from an input binary signal includes a measurement part and a signal output part. The measurement part measures the cumulative period of time of at least one of high-level and low-level states of the input binary signal for a predetermined period of time after the polarity of the input binary signal is inverted. The signal output part outputs at least one of high-level and low-level signals in accordance with the cumulative period of time.