Invention Grant
- Patent Title: Transceiver with latency alignment circuitry
- Patent Title (中): 具有延迟对准电路的收发器
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Application No.: US11078577Application Date: 2005-03-11
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Publication No.: US07124270B2Publication Date: 2006-10-17
- Inventor: John B. Dillon, deceased
- Applicant: Nancy D. Dillon, legal representative , Kevin Donnelly , Mark Johnson , Chanh Tran
- Applicant Address: US CA Los Altos
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA Los Altos
- Agency: Vierra Magen Marcus & DeNiro LLP
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
A transceiver device comprises a transmitter to transmit signals over a plurality of conductors to a memory device. An interface receives control information from a serial communication path coupled to a controller device. The control information is provided to the memory device as the signals using the transmitter. A register stores a control parameter that specifies a drive strength adjustment to the signals to transmit over the plurality of conductors to the memory device using the transmitter.
Public/Granted literature
- US20050160247A1 Transceiver with latency alignment circuitry Public/Granted day:2005-07-21
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