This patent describes a method of compiling a computer program from a sequence of computer instructions including a plurality of first, set branch, instructions which each identify a target address for a branch and a plurality of associated second, effect branch instructions which each implement a branch to a target address. The method comprising the steps of; reading the computer instructions in blocks; defining a set of target registers associated with each block for holding target addresses for the set branch instructions in that block; defining as a live range of blocks a set of blocks for which a target address of a particular set branch instruction is in a live state; and using the set of target registers and the live range to ensure that target registers holding target addresses in a live state are not available for other uses.