A memory section includes an array of a plurality of memory elements, an address selecting circuit, a data selecting circuit having a data writing section for being driven for writing or reading normal data or test data, and a data reading section for generating an output to represent a positive and a negative of a read value of stored data from the memory elements. A memory controlling section includes a computing means for inputting/outputting, computing, storing, or controlling data and control information, a nonvolatile defect-and-fault recovery table used for holding an inherent history of a semiconductor memory, registering a detected defect or fault, and mapping the memory element by the unit of address or by the unit of data selection path of the memory element to a registered alternative address or data selection path, and a controlling and storing means for storing data, information for control or test, or a processing procedure.