Supportably mounted by each chassis of a multi-chassis broadcast router are primary router matrix cards, redundant router matrix cards and clock-demanding input and output cards. A first master clock resides on the primary router matrix card of a first chassis while a second master clock resides on the redundant router matrix card of a second chassis. Each master clock is configured to provide a respective common clock signal to all of the input and output cards of the first and second chassis. Control logic determines whether the first master clock or the second master clock issues the common clock signal.