发明授权
US07170084B1 Strained silicon MOSFET having improved source/drain extension dopant diffusion resistance and method for its fabrication
有权
具有改善的源极/漏极延伸掺杂剂扩散电阻的应变硅MOSFET及其制造方法
- 专利标题: Strained silicon MOSFET having improved source/drain extension dopant diffusion resistance and method for its fabrication
- 专利标题(中): 具有改善的源极/漏极延伸掺杂剂扩散电阻的应变硅MOSFET及其制造方法
-
申请号: US10872707申请日: 2004-06-21
-
公开(公告)号: US07170084B1公开(公告)日: 2007-01-30
- 发明人: Qi Xiang , Jung-Suk Goo , Haihong Wang
- 申请人: Qi Xiang , Jung-Suk Goo , Haihong Wang
- 申请人地址: US CA Sunnyvale
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: US CA Sunnyvale
- 代理机构: Foley & Lardner LLP
- 主分类号: H01L29/06
- IPC分类号: H01L29/06 ; H01L31/0328 ; H01L31/0336 ; H01L31/072 ; H01L31/109
摘要:
An n-type MOSFET (NMOS) is implemented on a substrate having an epitaxial layer of strained silicon formed on a layer of silicon germanium. The MOSFET includes first halo regions formed in the strained silicon layer that extent toward the channel region beyond the ends of shallow source and drain extensions. Second halo regions formed in the underlying silicon germanium layer extend toward the channel region beyond the ends of the shallow source and drain extensions and extend deeper into the silicon germanium layer than the shallow source and drain extensions. The p-type dopant of the first and second halo regions slows the high rate of diffusion of the n-type dopant of the shallow source and drain extensions through the silicon germanium toward the channel region. By counteracting the increased diffusion rate of the n-type dopant in this manner, the shallow source and drain extension profiles are maintained and the risk of degradation by short channel effects is reduced.
信息查询
IPC分类: