A multi-chip package comprises a double-sided circuit board having first and second surfaces. Each surface has a package area and a peripheral area. Each package area has a chip mounting area on which a chip is attached, and a bonding area with which the chip is electrically connected. The peripheral area of the first surface has a runner area on which molding compound flows, and the peripheral area of the second surface has external connection pattern with which the bonding areas are electrically connected. In particular, the circuit board has gate holes, which are co-located on each surface to result in a common hole.