Invention Grant
- Patent Title: Thin film transistor array panel and manufacturing method thereof
- Patent Title (中): 薄膜晶体管阵列面板及其制造方法
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Application No.: US11082967Application Date: 2005-03-18
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Publication No.: US07172913B2Publication Date: 2007-02-06
- Inventor: Woo-Geun Lee , Beom-Seok Cho , Je-Hun Lee , Chang-Oh Jeong , Sang-Gab Kim , Min-Seok Oh , Young-Wook Lee , Hee-Hwan Choe
- Applicant: Woo-Geun Lee , Beom-Seok Cho , Je-Hun Lee , Chang-Oh Jeong , Sang-Gab Kim , Min-Seok Oh , Young-Wook Lee , Hee-Hwan Choe
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: F. Chau & Associates LLC
- Priority: KR10-2004-0018805 20040319; KR10-2004-0064021 20040813
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A method of manufacturing a thin film transistor array panel including forming a gate line on a substrate, forming a gate insulating layer on the gate line, forming a semiconductor layer on the gate insulating layer, forming a data line and a drain electrode on the semiconductor layer, depositing a passivation layer on the data line and the drain electrode, forming a photoresist including a first portion and a second portion, which is thinner than the first portion, on the passivation layer, etching the passivation layer using the photoresist as a mask to expose a portion of the drain electrode, removing the second portion of the photoresist, depositing a conductive film, and removing the first portion of the photoresist to form a pixel electrode on the exposed portion of the drain electrode.
Public/Granted literature
- US20050221546A1 Thin film transistor array panel and manufacturing method thereof Public/Granted day:2005-10-06
Information query
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