An electrical connection terminal of an embedded chip and a method for fabricating the same are disclosed. An insulating layer is provided on a circuit board integrated with a chip and has a plurality of first openings for exposing a conductive pad of the chip. A first metal layer is formed on the conductive pad, and a conductive layer if formed on surfaces of the first metal layer, the insulating layer and the first openings. A patterned resist layer is formed on the conductive layer and has a plurality of second openings for exposing a part of the conductive layer corresponding to the condictive pad of the chip. A second metal layer is formed on the exposed part of the conductive layer by an electroplating process. Thus, the fabrication of conductive structure of the conductive pad of the ship and build-up of conductive circuits on the circuit board are integrated simultaneously.