Invention Grant
- Patent Title: Method of manufacturing multi-layer printed circuit board
- Patent Title (中): 制造多层印刷电路板的方法
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Application No.: US11106642Application Date: 2005-04-15
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Publication No.: US07178234B2Publication Date: 2007-02-20
- Inventor: Yogo Kawasaki , Hiroaki Satake , Yutaka Iwata , Tetsuya Tanabe
- Applicant: Yogo Kawasaki , Hiroaki Satake , Yutaka Iwata , Tetsuya Tanabe
- Applicant Address: JP Ogaki
- Assignee: Ibiden Co., Ltd.
- Current Assignee: Ibiden Co., Ltd.
- Current Assignee Address: JP Ogaki
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, P.C.
- Priority: JP11/303305 19991026; JP11/303306 19991026; JP11-303307 19991026; JP2000-029988 20000208
- Main IPC: H01R3/10
- IPC: H01R3/10

Abstract:
Through holes 36 are formed to penetrate a core substrate 30 and lower interlayer resin insulating layers 50, and via holes 66 are formed right on the through holes 36, respectively. Due to this, the through holes 36 and the via holes 66 are arranged linearly, thereby making it possible to shorten wiring length and to accelerate signal transmission speed. Also, since the through holes 36 and the via holes 66 to be connected to solder bumps 76 (conductive connection pins 78), respectively, are directly connected to one another, excellent reliability in connection is ensured.
Public/Granted literature
- US20050189136A1 Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board Public/Granted day:2005-09-01
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