发明授权
- 专利标题： Method and arrangement for reducing source/drain resistance with epitaxial growth
- 专利标题（中）： 用外延生长降低源/漏电阻的方法和装置
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申请号： US11072312申请日： 2005-03-07
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公开(公告)号： US07183169B1公开(公告)日： 2007-02-27
- 发明人: Andrew M. Waite , Scott Luning , Philip A. Fisher
- 申请人： Andrew M. Waite , Scott Luning , Philip A. Fisher
- 申请人地址： US CA Sunnyvale
- 专利权人： Advanced Micro Devices, Inc.
- 当前专利权人： Advanced Micro Devices, Inc.
- 当前专利权人地址： US CA Sunnyvale
- 主分类号： H01L21/336
- IPC分类号： H01L21/336
摘要：
A method and arrangement for reducing the series resistance of the source and drain in a MOSFET device provides for epitaxially grown regions on top of the source and drain extensions to cover portions of the top surfaces of the silicide regions formed on the substrate. The epitaxial material provides an extra flow path for current to flow through to the silicide from the extension, as well as increasing the surface area between the source/drain and the silicide to reduce the contact resistance between the source/drain and the silicide.