发明授权
US07186641B2 Methods of forming metal interconnection lines in semiconductor devices
有权
在半导体器件中形成金属互连线的方法
- 专利标题: Methods of forming metal interconnection lines in semiconductor devices
- 专利标题(中): 在半导体器件中形成金属互连线的方法
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申请号: US11009470申请日: 2004-12-10
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公开(公告)号: US07186641B2公开(公告)日: 2007-03-06
- 发明人: Seung Hyun Kim
- 申请人: Seung Hyun Kim
- 申请人地址: KR Seoul
- 专利权人: Dongbu Electronics Co., Ltd.
- 当前专利权人: Dongbu Electronics Co., Ltd.
- 当前专利权人地址: KR Seoul
- 代理商 Andrew D. Fortney
- 优先权: KR10-2003-0090326 20031211
- 主分类号: H01L21/4763
- IPC分类号: H01L21/4763
摘要:
A method of forming metal interconnection line for a semiconductor device being capable of forming a plug without voids irrespective of aspect ratios is provided. In one example, the method includes forming a first metal layer on a semiconductor substrate; forming a second metal layer on the first metal layer; forming the plugs by patterning the second metal layer; forming the lower metal interconnection lines by patterning the first metal layer; and forming an interlayer insulating layer having a planarized surface on the substrate to fill gaps between the lower metal lines and between the plugs.
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