发明授权
- 专利标题: Apparatus for controlling packet output
- 专利标题(中): 用于控制分组输出的装置
-
申请号: US10281366申请日: 2002-10-25
-
公开(公告)号: US07190674B2公开(公告)日: 2007-03-13
- 发明人: Takahiro Kobayakawa , Hiroaki Yamashita
- 申请人: Takahiro Kobayakawa , Hiroaki Yamashita
- 申请人地址: JP Kawasaki
- 专利权人: Fujitsu Limited
- 当前专利权人: Fujitsu Limited
- 当前专利权人地址: JP Kawasaki
- 代理机构: Katten Muchin Rosenman LLP
- 优先权: JP2002-129149 20020430
- 主分类号: H04L12/66
- IPC分类号: H04L12/66 ; H04L12/28 ; H04L12/26
摘要:
In a packet scheduler, an arithmetic-operation controlling means designates output ports in a time-sharing manner and a parallel arithmetic operation means performs an arithmetic operation common with the queues of each designated output port to obtain packet output completion due times (evaluation factors) of the top packets of queues of each output port. Intra-port selecting means selects the evaluation factor of a packet that is to be preferentially output for each output port based on the result of the arithmetic operations. Then inter-port selecting means determines one to be most-preferentially output from the top packets selected based on the selected evaluation factors and the bandwidths for the output ports. Therefore, an apparatus for controlling packet output having such a packet scheduler can realize accurately control bandwidths of a plurality of queues, high-speed processing and the reduced size thereby being incorporated in hardware.
公开/授权文献
- US20030202517A1 Apparatus for controlling packet output 公开/授权日:2003-10-30
信息查询