发明授权
US07191355B1 Clock synchronization backup mechanism for circuit emulation service 有权
电路仿真服务的时钟同步备份机制

Clock synchronization backup mechanism for circuit emulation service
摘要:
A clock synchronization backup mechanism is disclosed for maintaining clock synchronization during periods of degraded synchronization. The clock synchronization backup mechanism includes a jitter buffer having a fill value at a given sample time which is compared with a threshold. When the jitter buffer fill value exceeds the threshold, a non-normal condition is registered and the local clock frequency is set to a combination of a long-term frequency setting plus a threshold sensitive frequency adjustment. The clock synchronization backup mechanism is particularly useful for overcoming residual errors accumulated due to temperature change, oscillator degradation, and a variety of other system perturbations problematical for clock synchronization mechanisms known in the art.
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