发明授权
US07194672B2 CRC verification apparatus with constant delay and method thereof
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具有恒定延迟的CRC校验装置及其方法
- 专利标题: CRC verification apparatus with constant delay and method thereof
- 专利标题(中): 具有恒定延迟的CRC校验装置及其方法
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申请号: US10723551申请日: 2003-11-25
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公开(公告)号: US07194672B2公开(公告)日: 2007-03-20
- 发明人: Chan Kim , Seung Hwan Kim , Tae Whan Yoo , Hyeong Ho Lee
- 申请人: Chan Kim , Seung Hwan Kim , Tae Whan Yoo , Hyeong Ho Lee
- 申请人地址: KR
- 专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人地址: KR
- 代理机构: Blakely Sokoloff Taylor & Zafman
- 优先权: KR10-2002-0074351 20021127
- 主分类号: H03M13/00
- IPC分类号: H03M13/00
摘要:
An apparatus and method for detecting errors in received data and transferring only error-free data in data communications are provided. In the cyclic redundancy check (CRC) verification apparatus and method having a constant delay, irrespective of the length of a received data frame, input and output processing delay of received data is made to be constant. The CRC verification apparatus having constant delay comprises an input control unit which stores the start address of an input data frame in a memory storing the input data frame, and stores a CRC verification result in the start address location; and an output control unit which after a predetermined constant time passes from the start address, reads an input data frame and if the CRC verification result is normal, output the read data frame. The apparatus and method make the time taken for receiving a data frame, constant irrespective of the received data frame, while CRC verification is performed.
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