发明授权
US07197678B2 Test circuit and method for testing an integrated memory circuit 有权
用于测试集成存储器电路的测试电路和方法

  • 专利标题: Test circuit and method for testing an integrated memory circuit
  • 专利标题(中): 用于测试集成存储器电路的测试电路和方法
  • 申请号: US10613367
    申请日: 2003-07-03
  • 公开(公告)号: US07197678B2
    公开(公告)日: 2007-03-27
  • 发明人: Carsten OhlhoffPeter Beer
  • 申请人: Carsten OhlhoffPeter Beer
  • 申请人地址: DE Munich
  • 专利权人: Infineon Technologies AG
  • 当前专利权人: Infineon Technologies AG
  • 当前专利权人地址: DE Munich
  • 代理商 Laurence A. Greenberg; Werner H. Stemer; Ralph E. Locher
  • 优先权: DE10229802 20020703
  • 主分类号: G11C29/00
  • IPC分类号: G11C29/00 G11C7/00
Test circuit and method for testing an integrated memory circuit
摘要:
A test circuit for testing a memory circuit has a data input line for providing test data and a comparator unit. The comparator unit is connected to the data input line and to the memory circuit for comparing the test data written into the memory circuit with the test data read from the memory area. The data input line is connected to the memory circuit via a data change circuit. The data change circuit is controllable depending on a result of a comparison in the comparator unit such that when an error occurs, subsequent test data can be written in an altered manner to the memory circuit.
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