Output circuit in which electric current consumption of operational amplifiers therein is reduced and distortion of the output waveforms of the operational amplifiers is also reduced. A bias circuit 30 is constituted from a bias current source 31, a bias voltage extracting circuit 22, a precharge circuit 34, and a precharge power supply 35. When a timing signal Tp of a predetermined pulse width is supplied to the bias circuit 30, MOS transistors 28 and 29 in the precharge circuit 34 are turned on during the period of its pulse width, and desired precharge voltages Vpn and Vpp are charged to capacitors Cn and Cp from the precharge power supply 35. The voltages charged to the capacitors Cn and Cp are supplied to operational amplifiers through an N-bias line 11 and a P-bias line 12 as bias voltages VbiasA and VbiasB, respectively, so that the operational amplifiers are controlled to be biased at high biases. The bias voltages VbiasA and VbiasB after precharging transition from high to low according to CR time constant curves for the discharge paths of the capacitors Cn and Cp. This transition period can be set by adjusting the precharge voltages using the variable precharge power supply 35.