Invention Grant
- Patent Title: Method of fabricating micro-electromechanical systems
- Patent Title (中): 制造微机电系统的方法
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Application No.: US10508129Application Date: 2003-03-19
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Publication No.: US07205173B2Publication Date: 2007-04-17
- Inventor: Kevin Michael Brunson , David James Hamilton , Robert John Tremayne Bunyan , Mark Edward McNie
- Applicant: Kevin Michael Brunson , David James Hamilton , Robert John Tremayne Bunyan , Mark Edward McNie
- Applicant Address: GB
- Assignee: QinetiQ Limited
- Current Assignee: QinetiQ Limited
- Current Assignee Address: GB
- Agency: McDonnell Boehnen Hulbert & Berghoff LLP
- Priority: GB0206509.2 20020320
- International Application: PCT/EP03/50071 WO 20030319
- International Announcement: WO03/078301 WO 20030925
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A MEMS incorporating a sensing element and a JFET electrically connected to the sensing element is fabricated by the steps of: forming a first layer of electrically insulating barrier material on a surface of a substrate; patterning the first layer so as to expose a first region of the substrate; doping by ion implantation the first region of the substrate to form a well region of the JFET; forming a second layer of barrier material on the surface of both the first layer and the first region of the substrate; patterning the barrier material so as to expose a part of the first region of the substrate; doping by ion implantation the exposed part of the first region of the substrate to form source and drain contact areas of the JFET; patterning the barrier material so as to expose a second region of the substrate; and doping by ion implantation the second region of the substrate to form gate and substrate contact areas of the JFET in a single implantion step. The monolithic integration of the JFET with the MEMS enables the bond wires for interconnecting the sensing element and the associated sensing electronic circuitry to be provided only after the buffering stage of such circuitry. This means that the bond wires interconnecting the buffering stage and the remainder of the circuitry are connected to a low impedance node which is less sensitive to noise and parasitic capacitive loading. Thus greater detection accuracy can be achieved by virtue of the fact that the parasitic capacitances are reduced to a minimum.
Public/Granted literature
- US20050139871A1 Micro-electromechanical systems Public/Granted day:2005-06-30
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