发明授权
US07208831B2 Semiconductor device having multilayer wiring structure and method, wherein connecting portion and wiring layer are formed of same layer
失效
具有多层布线结构和方法的半导体器件，其中连接部分和布线层由相同的层形成
- 专利标题： Semiconductor device having multilayer wiring structure and method, wherein connecting portion and wiring layer are formed of same layer
- 专利标题（中）： 具有多层布线结构和方法的半导体器件，其中连接部分和布线层由相同的层形成
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申请号： US10755003申请日： 2004-01-08
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公开(公告)号： US07208831B2公开(公告)日： 2007-04-24
- 发明人: Yuji Fukazawa
- 申请人： Yuji Fukazawa
- 申请人地址： JP Tokyo
- 专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人： Kabushiki Kaisha Toshiba
- 当前专利权人地址： JP Tokyo
- 代理机构： Frommer Lawrence & Haug LLP
- 优先权： JP2000-183194 20000619; JP2001-138681 20010509
- 主分类号： H01L23/48
- IPC分类号： H01L23/48 ; H01L21/02 ; H01L21/4763
摘要：
A method for manufacturing a semiconductor device includes a step of forming a first groove in a first insulating film, forming a conductive film in the first groove, a step of selectively forming a second insulating film on the conductive film and the first insulating film, a step of forming a second groove by removing part of the conductive film using the second insulating film as a mask, the second groove being formed so as to form a connecting portion of the conductive film under the second insulating film and form a first wiring layer by forming the connecting portion with a bottom of the first groove integrally with each other as one unit.
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