发明授权
US07216311B2 System and method for evaluating a semiconductor device pattern, method for controlling process of forming a semiconductor device pattern and method for monitoring a semiconductor device manufacturing process
有权
用于评估半导体器件图案的系统和方法，用于控制形成半导体器件图案的工艺的方法和用于监测半导体器件制造工艺的方法
- 专利标题： System and method for evaluating a semiconductor device pattern, method for controlling process of forming a semiconductor device pattern and method for monitoring a semiconductor device manufacturing process
- 专利标题（中）： 用于评估半导体器件图案的系统和方法，用于控制形成半导体器件图案的工艺的方法和用于监测半导体器件制造工艺的方法
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申请号： US10648231申请日： 2003-08-27
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公开(公告)号： US07216311B2公开(公告)日： 2007-05-08
- 发明人: Maki Tanaka , Chie Shishido , Ryo Nakagaki , Yuji Takagi
- 申请人： Maki Tanaka , Chie Shishido , Ryo Nakagaki , Yuji Takagi
- 申请人地址： JP Tokyo
- 专利权人： Hitachi High-Technologies Corporation
- 当前专利权人： Hitachi High-Technologies Corporation
- 当前专利权人地址： JP Tokyo
- 代理机构： Antonelli, Terry, Stout & Kraus, LLP.
- 优先权： JP2003-033522 20030212
- 主分类号： G06F17/50
- IPC分类号： G06F17/50 ; G06F9/45 ; G01N23/00
摘要：
In order to realize a means for acquiring three-dimensional shape information about patterns by nondestruction and evaluate a relationship between the three-dimensional shape information about these patterns and device properties, a semiconductor device pattern evaluating system is provided with a feature index calculating means for quantifying a property of a three-dimensional shape of a pattern to be evaluated, as feature index, a database that records therein a relationship between the feature index of each three-dimensional pattern shape and a device property of a circuit containing patterns each having the feature index, and a device property estimating means for estimating a property of a device circuit formed by the pattern to be evaluated, on the basis of the feature index of the three-dimensional pattern shape, which have been quantified by the feature index calculating means, and the information recorded in the database.
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