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US07223675B2 Method of forming pre-metal dielectric layer 失效
形成预金属介电层的方法

  • Patent Title: Method of forming pre-metal dielectric layer
  • Patent Title (中): 形成预金属介电层的方法
  • Application No.: US11126900
    Application Date: 2005-05-10
  • Publication No.: US07223675B2
    Publication Date: 2007-05-29
  • Inventor: Jae Suk Lee
  • Applicant: Jae Suk Lee
  • Applicant Address: KR Seoul
  • Assignee: Dongbu Electronics Co., Ltd.
  • Current Assignee: Dongbu Electronics Co., Ltd.
  • Current Assignee Address: KR Seoul
  • Agent Andrew D. Fortney
  • Priority: KR10-2004-0033006 20040511
  • Main IPC: H01L21/425
  • IPC: H01L21/425
Method of forming pre-metal dielectric layer
Abstract:
A method of forming a pre-metal dielectric (PMD) layer is disclosed. In the method, after a nitride liner layer is formed on a substrate having a transistor, a USG layer is deposited thereon and then planarized. Next, ion implantation and annealing are performed for gettering, first in a gate region and then in a non-gate region of the USG layer. The USG layer is generally free from plasma damage and has a good gap-fill capability. Further, ion implantation and annealing after deposition of the USG layer may enhance a gap-fill capability, a gettering capability, and electrical properties of a transistor.
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