发明授权
- 专利标题: Semiconductor component having plate and stacked dice
- 专利标题(中): 半导体元件具有板和堆叠的骰子
-
申请号: US11333662申请日: 2006-01-17
-
公开(公告)号: US07224051B2公开(公告)日: 2007-05-29
- 发明人: Warren M. Farnworth , Alan G. Wood , William M. Hiatt , James M. Wark , David R. Hembree , Kyle K. Kirby , Pete A. Benson
- 申请人: Warren M. Farnworth , Alan G. Wood , William M. Hiatt , James M. Wark , David R. Hembree , Kyle K. Kirby , Pete A. Benson
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理商 Stephen A. Gratton
- 主分类号: H01L23/02
- IPC分类号: H01L23/02
摘要:
A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back side of the base die. The component also includes an array of terminal contacts on the circuit side of the base die in electrical communication with the conductive vias. The component can also include an encapsulant on the back side of the base die, which substantially encapsulates the secondary die, and a polymer layer on the circuit side of the base die which functions as a protective layer, a rigidifying member and a stencil for forming the terminal contacts. A method for fabricating the component includes the step of bonding singulated secondary dice to base dice on a base wafer, or bonding a secondary wafer to the base wafer, or bonding singulated secondary dice to singulated base dice.
公开/授权文献
- US20060113682A1 Semiconductor component having plate and stacked dice 公开/授权日:2006-06-01
信息查询
IPC分类: